In order to increase the computational power of the chips at the rate to which we have grown accustomed, the additional cores or processing units have been given by the team of researchers to the chips as computer chips have stopped getting faster.
Today, generally there are six or eight cores in a typical chip which have the ability to communicate with each other with the help of a single bundle of wires which is called a bus. There is only a one pair of cores which can talk at a time with a bus. This could be a serious limitation in case of chips with hundreds or even thousands of cores which can be envision as the future of computing by many engineers.
The team of researchers focused on making cores to communicate the same way as computers hooked to the internet do with the help of bundling that information which they transmit into packets. There will be separate router for each core which will be able to send a packet down any of several paths as well as depends on the condition of a network as a whole.
The theoretical limits on the efficiency of packet switched on chip communication networks have been established by the researchers as well as the measurements which have been performed on a test chip also presented by the researchers in which they have come very close to reaching several of those limits.
Multi core chips are considered faster than single core chips as they have the ability to split up computational tasks as well as run them on several cores at once. There will be need to share data occasionally when cores working on the same tasks but the core count has been low enough on commercial chips that even a single bus has the ability to handle the extra communication load.
Some core chips have been found in high end servers and they have recently added a second bus but this approach is not applicable in working for chips with hundreds of cores. Usually there has a lot of power been taken by the buses as they are trying to drive long wires at the same time of eight to ten cores. On the other hand, there is a communication only of each core with the four cores nearest it. Here is a driving of short segments of wires so that they would allow the researchers to go lower in voltage.